design rule checking

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By: Mentor Graphics     Published Date: Sep 01, 2010
This paper will examine current methods used to eliminate waived errors at the chip level and describe a new automatable method for identifying and removing waived errors from DRC results.
Tags : mentor graphics, automated drc, violation waiver management, ip block integration, design rule checking, tcp/ip protocol, application integration, business process automation, electronic design automation, system on a chip, electronic test and measurement, integrated circuits and semiconductors, data center design and management
     Mentor Graphics
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